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Arithmatica Develops Integrated Flow with Cadence Encounter RTL Compiler to Accelerate Design and Verification of Math-Critical Chips
NVIDIA Corporation Benefits from Companies' Collaboration
in OpenChoice Program
MENLO PARK, Calif.—(BUSINESS WIRE)—Feb. 3, 2005—
Arithmatica, Inc., the silicon math company, today announced an
integrated, front-end flow for mutual customers of Arithmatica and
Cadence Design Systems, Inc. (NYSE:CDN) (Nasdaq:CDN) intended to
improve quality of silicon for math-critical chips. Developed as part
of the Cadence(R) OpenChoice Program, the flow includes best-in-class
Arithmatica CellMath silicon IP as well as leading-edge Cadence
synthesis technology -- Encounter(TM) RTL Compiler synthesis -- and
Encounter Conformal(R) formal verification tools. Users can quickly
verify equivalency to design specifications, making it ideal for
customers that face very aggressive design and verification cycles,
such as those involved in consumer electronics. Cadence is the largest
supplier of electronic design technologies, methodology services and
design services, while Arithmatica is the only company focused on
using advances in silicon math to increase speed and/or lower costs
for math-intensive ICs.
"We are pleased to welcome Arithmatica as the newest member of the
OpenChoice program," said Jan Willis, senior vice president of
industry marketing at Cadence. "Cadence's growing strengths in the RTL
design and verification space are leveraged by integrating quality IP
with Encounter RTL Compiler. Our collaboration with Arithmatica will
enable customers to bring their designs to market faster and with
higher quality of silicon."
The Cadence OpenChoice program enables interoperability and
facilitates open collaboration with IP providers to build, validate,
and deliver accurate models optimized for Cadence design and
verification solutions. The program aims to ensure IP quality and
provide the semiconductor industry with access to optimized IP through
a complete IP catalog. This optimizes the electronics design chain and
accelerates customer time to market.
New Flow Streamlines CellMath IP Delivery
The new integrated flow improves silicon end-results for
math-critical chip design in two key ways. First, Arithmatica's work
with Cadence ensures that CellMath IP, delivered typically as a
gate-level netlist, is proven against the bit-accurate Verilog
simulation model with the aid of Cadence's Conformal formal
equivalency checking technology, which includes unique data path
capabilities to verify equivalence of the behavioral model and
netlist. Second, use of Encounter RTL Compiler ensures that the
CellMath IP architectures are efficiently integrated and optimized
within an overall chip design. Using CellMath IP in such a flow,
NVIDIA Corporation achieved significant chip area reductions in major
floating-point blocks.
Chris Malachowsky, co-founder and vice president of hardware
engineering at NVIDIA Corporation, said, "NVIDIA relies on this type
of collaboration to help us reach new thresholds of graphics
performance within very aggressive design cycles. Gaining the
performance of CellMath IP while using multiple synthesis vendor flows
has helped us set the bar for GPU performance with the NVIDIA(R)
GeForce(TM) 6 series GPU, which some have called 'a gamer's dream.'"
Dave Burow, Chairman of the Board at Arithmatica, added, "The best
way to create design flows that really work is through the
collaboration of all parties working on challenging production
designs. NVIDIA is great at providing the access and feedback needed
by its EDA and IP suppliers to integrate new technologies into their
flow. Many of our target customers, like NVIDIA, are pushing the
performance envelope, and within these customers we often see RTL
Compiler being used. We expect that many mutual customers of Cadence
and Arithmatica can benefit from this flow."
About Arithmatica
Arithmatica is the first company focused solely on using advances
in silicon math to increase speed and/or lower costs for
math-intensive ICs, such as 3D graphics accelerators and
high-performance processors. Its unique IP provides significant
improvement to licensees' arithmetic IC circuits. Arithmatica is
headquartered in Menlo Park, Calif., with a research and development
center in Warwick, England. For further information, please visit:
www.arithmatica.com.
Note to Editors: Arithmatica, the Arithmatica logo and CellMath
are trademarks of Arithmatica, Inc. NVIDIA and GEFORCE are registered
trademarks and/or trademarks of NVIDIA Corporation in the United
States and other countries. All other trademarks and registered
trademarks belong to their respective companies.
Contact:
ThinkBold Corporate Communications, LLC
Sarah Miller for Arithmatica, Inc., 978-369-9675
sarah@thinkbold.com
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